Cadence offers technology to speed up design cycle of ADAS
Cadence Design Systems, the California-based global leader in making Electronic Design Automation (EDA) tools redefines the automotive safety path by offering a proven Intellectual Property (IP) that can speed up the design cycle of the Advanced Driver Assistance chip (ADAS) designs. In India, Cadence Bangalore facility comprises field engineering, global customer support, R&D across platforms, marketing, finance, IT support and human resource functions.
The technology needs for communication, audio, imaging and vision are addressed with Cadence’s Tensilica customisable processors that implement new algorithms. The automotive companies can implement new algorithms very efficiently and save up to half of the silicon and half of the power.
Sources in Cadence Design Systems said, “ADAS technology supports real time data processing for sensors and cameras, to enable sensor fusion for safety-critical systems. It also enables automated parking, lane departure and vehicle-to-vehicle communication. Our IP is used in many areas for driver’s assistance. Some of the areas include imaging and video assistance like traffic sign recognition, voice and gesture recognition, car2x and V2V communication, ethernet and other standards-based IP and other functional verifications. Consumers have reacted very favorably to our ADAS technology that makes vehicles much more aware of the surrounding driver environment and render much safety attributes to drive.”
Demand for these features is growing as fast as the technology is evolving to provide sensors, cameras, and sensor fusion software to perform obstacle detection and lane departure warnings. Also the software helps read automatically the street signs, display speed limits, control speed and distance to the car in the front, and perform other vital functions. In addition, with the help of the company’s technologies, cars can exchange more and more information with other cars and their environment to make a smarter driving experience. These essential driver assistance technologies are evolving at a very fast pace. It is a challenge to keep up with the technology requirements for the race towards autonomous vehicles or self-driving cars.
In an intelligent electronic system, unexpected errors can lead to unplanned, unexpected behavior in functional components. This can be a potentially dangerous proposition for automotive manufacturers, as well as a costly occurrence for consumer product developers. Compliance to the latest safety standards can be a laborious and timeconsuming process. There are now technologies that can automate the process of meeting functional safety requirements. From staying up-to-date on the latest standards to managing all of the associated data, and complying with functional safety
requirements have been a timeconsuming, manual effort.
The company is transforming this process by automating fault detection and result analysis for intellectual property (IP), systemon-chip (SoC), and system designs. “Built on the proven Cadence incisive verification platform, our end- to-end functional safety solution reduces the automotive ISO26262 compliance effort by 50%. The solution is available as part of our development suite,” sources said.
Highlighting the challenges while meeting functional requirements, a company spokespersons said, “Meeting functional requirements is a critical challenge and it calls for checkers which monitor the system and trigger error recovery features when necessary. Redundancy is another attribute which provides continuous function in the event of errors. Hence it is obligatory for the safety engineers to align the development flow with the Tool Confidence Level (TCL). Functional verification should take place at all levels of abstraction and for all system elements. Safety verification, which measures response of systems to undesired or unplanned events, is another critical step. Finally to be in full compliance, safety engineers keep abreast of the record and report on all functional safety requirements”.
The electronic design automation tool company also unveiled virtuoso platform. Through this platform it offers designers an average of 10x performance and capacity improvement across the platform. The platform includes new technologies within the Cadence Virtuoso Analog Design Environment (ADE) and enhancements to the Cadence Virtuoso Layout Suite to address requirements for automotive safety, medical device and Internet of Things (IoT) applications.
The next-generation Cadence virtuoso ADE product suite addresses the challenges that come with the emergence of new industry standards, advanced-node designs and the requirements for system design, enabling engineers to explore, analyse and verify designs to ensure that design intent is maintained throughout the design cycle. Enhanced data handling provides up to 20X improvement in loading waveform databases in excess of 1GB and a 50X improvement in versioning and loading set-up files into the environment.
The enhanced Virtuoso Layout Suite addresses the most complex layout challenges by offering accelerated performance and productivity for custom analog, digital and mixed-signal designs at the device, cell, block and chip levels. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems.
Cadence has offices in Noida, Bangalore, Pune, Hyderabad and Ahmedabad. Established in 1987, the Noida site is the largest Cadence R&D site outside the US with over 1,700 employees. The company’s 5 regions support R&D work done in India and focus on developing design automation solutions to address the needs of advanced technology nodes by leveraging its leadership in EDA technology. Field Operations provide sales and engineering support across all technologies.
ADAS applications supported by Tensilica DSPs and partner ecosystem