Use of multicore and parallel test systems
s the complexity and functionality of electronic devices grow exponentially (in sync with Moore’s law), so does the cost of testing them. Minimising the cost of test can be challenging, but one way is to test more with less. The inherent parallelism that is made available by the graphical programming paradigm of software like LabVIEW from National Instruments and FlowStone DSP from DSP Robotics helps engineers immediately and overcome the complexity associated with traditional text-based languages.
The trend of increasing clock speed to get better performance ended back in the early 2000s. Since then, processor manufacturers have implemented alternate technologies to ramp up performance while keeping the clock speeds around 3 GHz. These technologies include the use of processors with multiple cores on a single chip, hyperthreading, wider buses and hyper transport. Moreover, the advancement of the process node to the current 22nm process by utilising 3D transistors has resulted in significantly faster, leaner and more efficient processors for use in embedded controllers and modular instrumentation.
Denver D’Souza, senior technical consultant at National Instruments India, says, “The reality that transistor density doubles every advances in the performance of electronic devices. This is evident not only in the latest Intel Core i7 processors but in the shrinking of technology such as 64GB solidstate drives, which are now the size of a postage stamp. These technological advances translate into considerable cost reductions.”