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As electronic products achieve even higher performance, their increasing complexity makes it harder to design, verify and debug. During the extensive verification that is performed to pick up problems, the ability to simultaneously observe and analyse bot
Many engineers are comfortable with their oscilloscope, and in order to save time, may choose to buy three or four oscilloscopes so that they can probe multiple signals at once. Logic analysers provide the ability to probe multiple digital signals, but the complexity of the debug task may not merit the setup and learning curve required to use the logic analyser,” says Saivenkat Kumar, country marcomm ( EMEA marketing), Tektronix.
Logic analysers and oscilloscopes have co- existed for decades, finally giving birth to mixed-signal oscilloscopes (MSOs). Once a niche product category pioneered by HP (now Agilent Technologies), MSOs are now offered by all major scope vendors.
“In old days test engineers were using two sets of instruments—basi- cally an oscilloscope to check the analogue characteristics such as frequency, rise time and fall time of a signal, and logic analysers for digital characterisation. But now with more of mixed-signal designs and also for FPGAs and microcontrollers, MSO is the preferred choice. With two or four analogue channels and up to 16 digital channels, a user can do both analogue and digital characterisation from the same instrument. This saves the cost as well as the time to set up multiple instruments, and also makes it easy to use,” explains Sadaf Arif Siddiqui, marketing programme manager, Agilent Technologies.
High-resolution and larger displays
Mixed-signal oscilloscopes being visual tools, a larger and higher-resolution screen makes them better—unless there is a portability requirement. Utilising the latest display technologies available, vendors have packed better displays into their instruments. Thus with the ability to view more, engineers can spot jitters and infrequent events quicker than in a lower-resolution display.
“Designers are often interested to capture smallest pulse widths of their embedded designs. The smallest pulse