PCIe 3.0 sup­port and high-speed stor­age

HWM (Malaysia) - - FEATURE -

With Z170, the pro­ces­sor is now con­nected ed to the chipset’s Plat­form Con­troller Hub (PCH) by the up­graded DMI 3.0 pro­to­col. Com­pared to the DMI 2.0 used in Z97, DMI I 3.0 fea­tures a speed boost from 5.0 GT/s to 8.0 GT/s, which en­ables sig­nif­i­cant up­grades­des in chipset con­nec­tiv­ity.

This ex­plains why In­tel Z170 is now able to sup­port PCIe 3.0 on the chipset it­self in­stead ead of PCIe 2.0 as on Z97. This re­sults in a to­tal l of 20 PCIe 3.0 lanes be­ing ex­posed through thehe chipset, com­pared to just eight PCIe 2.0 lanes on Z97. Sky­lake CPUs will con­tinue to o pro­vide 16 PCIe 3.0 lanes for your graph­ics s card, but ad­di­tional PCIe 3.0 lanes on the chipset it­self will now be avail­able for use with PCIe 3.0 x4 stor­age de­vices.

These de­vices were of course sup­ported ed on higher end Z97 moth­er­boards, but it en­tailed draw­ing from the 16 PCIe 3.0 lanes es pro­vided by the CPU. So if you plugged in an M.2 PCIe 3.0 x4 SSD into a com­pat­i­ble board, the band­width shar­ing would force e the PCIe 3.0 x16 slot to run in x8 mode.

But with Z170, such band­width shar­ing is no longer nec­es­sary and you’ll be able to uti­lize the max­i­mum avail­able band­width for both your graph­ics card and PCIe 3.0 x4 SSD. SD. PCIe-based SSDs will even­tu­ally re­place SATA-based drives, and it’s great to fi­nally see proper sup­port for high-speed stor­age e de­vices on In­tel’s latest main­stream chipset.et.

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