If not quan­tum com­put­ing, then what?


Moore’s Law is dead and quan­tum com­put­ing isn’t com­ing to the res­cue. Although, not any time soon. So, is there any­thing that can keep con­ven­tional com­put­ing mov­ing for­ward? One promis­ing tech­nol­ogy is car­bon nan­otubes, one of those won­der tech­nolo­gies with seem­ingly in­fi­nite pos­si­ble ap­pli­ca­tions, from space el­e­va­tors to so­lar cells. But how can they help com­put­ing? One of the key the­o­ret­i­cal ad­van­tages of tran­sis­tors built from car­bon nan­otubes could be much lower power con­sump­tion. That would al­low for more pow­er­ful chips to op­er­ate within the lim­ited en­ergy bud­get of a de­vice like a smart­phone. Phys­i­cally, it’s easy to fit a desk­top-class pro­ces­sor die in­side a smart­phone. Pow­er­ing it is the prob­lem, and car­bon nan­otubes might solve it.

Op­ti­cal in­ter­con­nects both be­tween and within chips are an­other big op­por­tu­nity. Just as fi­bre-op­tic tech­nol­ogy is boost­ing net­work speeds, in­clud­ing do­mes­tic In­ter­net con­nec­tions, build­ing op­ti­cal tech­nol­ogy into com­puter chips could un­lock a huge leap in band­width and en­ergy ef­fi­ciency. But of all the op­tions, more ef­fi­cient cir­cuit de­sign is likely to bring the most im­me­di­ate ben­e­fits to com­pute power. Graph­ics chips are a handy yard­stick, here. Al­ready, Nvidia’s GPUs are sig­nif­i­cantly more ef­fi­cient in terms of over­all graph­ics ren­der­ing per­for­mance per unit of die area than AMD’s com­pet­ing graph­ics chips. That’s thanks to bet­ter op­ti­mised chip de­sign.

For fu­ture Nvidia GPUs, in­clud­ing the brand new Tur­ing ar­chi­tec­ture, that re­fine­ment and ef­fi­ciency is set to im­prove fur­ther thanks to ar­chi­tec­tural tweaks that com­bine mul­ti­ple small op­er­a­tions into a sin­gle larger op­er­a­tion. AMD is tak­ing a sim­i­lar ap­proach with its Rapid Packed Math tech­nol­ogy in the lat­est Vega GPUs, even if it re­mains be­hind for over­all ef­fi­ciency. With Moore’s Law con­signed to his­tory, that kind of op­ti­mised chip de­sign will be more crit­i­cal than ever be­fore.

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