Chip Yields, Binning, and the Silicon Lottery
THE PRIMARY BUILDING BLOCK of modern computers is the silicon microchip, made from 300mm silicon wafers, cut from a large silicon crystal cylinder. The monolithic crystals are grown from a seed crystal dipped into a molten vat of nearly pure silicon.
That “nearly” is important. Small impurities in the wafers can lead to errors or non-functional parts. It’s not just impurities, though; the crystalline structure of the wafer also varies slightly. Chips from the center of a wafer tend to be “better” than those near the edge, so they may require less voltage to hit the same clock speed, or may run at higher clock speeds at the same voltage.
Because of the complexity of modern CPUs and GPUs, rather than having one failed circuit ruin the whole chip, redundancies are built into the design, and it’s possible to disable portions of a chip. Take AMD’s new Ryzen CPUs, where everything from the Ryzen 5 3600 up through the Ryzen 9 3950X is built using the same eight-core CCD (core chipset die) that measures 74mm2. The 3600/3600X and 3900X all use CCDs with only six cores enabled, while the 3700X/3800X and upcoming 3950X use CCDs with all eight cores enabled. Why would AMD disable two CPU cores in each CCD on some parts? To improve chip yields and overall profitability.
Each silicon wafer contains potentially hundreds of chips, but not every chip from a wafer behaves the same. After the initial manufacturing process, each wafer gets cut into chips. These are tested to determine how good each is in a process called binning. Some may work perfectly, others may be effectively useless, while many fall somewhere in between. The percentage of functioning chips is the yield. Most companies don’t report their yield, though rumors and estimates suggest that Intel’s firstgen 10nm process had yields in single digits: Less than 10 percent of the potential 10nm processors were viable—and that’s after Intel disabled the Gen10 graphics, and with a small dual-core die. In contrast, it’s estimated that by harvesting partially functioning dies, yields for AMD’s new Zen 2 parts may be 85 percent or higher.
This is important as each wafer has a relatively fixed cost—perhaps $7,000–$10,000. This is also why smaller chips are preferable to larger ones, as more can fit within the space of a wafer. A small 74mm2 chip like Zen 2 has a potential of nearly 800 chips per wafer, while Intel’s 10-core Skylake-X chips are around 322mm2 and only fit about 170 per wafer. With a defect density of 0.1 per cm2, the 10-core Skylake-X might lose up to a third of the potential chips (without harvesting), while the Zen 2 CCD would only have about 8 percent defective chips.
Binning addresses multiple aspects. Firstly, there’s the harvesting of partially functioning dies—so your RTX 2060 that uses the same TU106 GPU as the 2070 only has 30 out of a potential 36 SMs enabled, as well as two memory controllers disabled. Binning also determines the ideal voltage and frequency, and sometimes a chip that is otherwise fully functional might get downgraded because it can’t run at the desired speed. AMD’s RX 5700 and RX 5700 XT use the same Navi 10 GPU, but besides having 256 fewer cores, the 5700 is clocked about 150–200MHz lower.
The best chips are sold as the fastest, most expensive parts, while the functional but not quite as good chips are sold as lower tier parts. However, the gap between the “best” and “worst” functional chips from a wafer may be quite small. But for newer manufacturing nodes like TSMC’s 7nm or Intel’s upcoming 10nm, the gap is more likely to be larger. So, you won’t hit the same clock speeds on second or third tier products, no matter how hard you try to overclock. Unless you’re lucky, and win the silicon lottery with a great chip sold as a second-tier part. Jarred Walton has been a PC and gaming enthusiast for over 30 years.
Some chips may work perfectly, others may be useless, many fall somewhere in between.