INTEL’S 10NM NIGHTMARE WHAT WENT WRONG WITH INTEL’S LATEST NODE?

As far back as July 2015, Intel publicly confirmed that its 10nm node was in trouble. Fast forward nearly seven years and we’ve only just got our hands on its first desktop 10nm processors. Moore’s Law dictates a doubling of transistor densities every two years, implying a new process node on roughly the same cadence. So something has gone horribly wrong. But what, exactly?

The first problem was ambition. Intel simply went for too big a leap with 10nm. In 2009, for instance, Intel made the jump from 45nm to 32nm. With that came an increase in transistor density from 3.3 million per square millimeter to 7.5 million, a little over double the density. When 22nm arrived in 2011, it was a similar story. It upped the transistor density ante to 15.3 million, or slightly less than double.

Fast forward to 2014, one year later than you’d expect a new node from Intel, and 14nm delivered 37.5 million transistors per square millimeter. That’s well over double what 22nm delivered. 14nm was the first troubled node from Intel, and it’s likely no coincidence that it also attempted to more than double transistor density.

Then there’s 10nm. The first version of 10nm, which was used in tiny numbers to produce a dual-core mobile chip that almost nobody bought in late 2018, was good for a massive 100.8 million transistors per square mm. That’s a huge 2.7x scaling compared to 14nm and a big ask indeed.

The other problem was that Intel opted not to go with

EUV or extreme ultraviolet lithography technology. As we’ve explained elsewhere, the wavelength of light used in a lithography process ultimately dictates feature size. And, currently, EUV tech is the shortest wavelength and most advanced available for commercial production.

The reasons why Intel didn’t go with EUV are quite technical and are related to the fact that it tends to produce chips using single-die masks. Any damage to that mask threatens to kill the entire wafer. By contrast, the likes of TSMC and Samsung tend to use multi-die masks that can sustain some damage while maintaining reasonable yields. Also, EUV-compatible tools to protect masks, known as pellicles, only became available in 2019.

In short, Intel decided not to go with EUV, making that ambitious 2.7x density scaling even more technically challenging. Intriguingly, Intel’s next node, formally known as 7nm and now branded Intel 4, is expected to be less ambitious in ‘only’ increasing transistor density to 180 million per square millimeter, less than double that of its existing 10nm node. It will also be the first Intel node to use EUV technology.