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Re­mem­ber when RISC ver­sus CISC was the bat­tle of the ages? Even to­day, In­tel’s chips and the up­start bat­tal­ions of ARM pro­ces­sors align ac­cord­ing to this par­a­digm, with x86 CPUs still CISC (or com­plex in­struc­tion set com­put­ing), and ARM rep­re­sent­ing the van­guard of RISC (or re­duced in­struc­tion set com­put­ing).

But, in prac­tice, it’s a moot point. That’s be­cause ever since the Pen­tium Pro (and in­deed AMD’s K5), x86 pro­ces­sors have re­ally been RISC chips in­ter­nally, and have re­lied upon a mi­crocode trans­la­tion layer to han­dle the x86 CISC in­struc­tion set. What’s more, over time, x86 cod­ing has co­a­lesced around a rel­a­tively small num­ber of com­monly used in­struc­tions. All of which means that the old di­vides that saw x86 chips re­quire rel­a­tively com­plex com­pil­ers, along with com­plex in­struc­tion sched­ul­ing and de­cod­ing hard­ware, and thus a higher tran­sis­tor count for a given the­o­ret­i­cal per­for­mance ca­pa­bil­ity, not to men­tion lim­i­ta­tions on in­struc­tion pipe­lin­ing, no longer fully ap­ply. CISC ar­chi­tec­tures, such as ARM, have like­wise be­come more com­plex, with sup­port for float­ing point math, vir­tu­al­iza­tion, and hard­ware cryp­tog­ra­phy. In short, RISC ver­sus CISC is no longer the cru­cial ques­tion.

Win­ner: It sim­ply doesn’t mat­ter

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