Khalifa University patents new method to compress images
A team of researchers from Khalifa University has investigated a memristor-based image compression architecture to speed up image compression
In the time of unlimited data phone plans, it’s easy to forget that we were once constrained by how much data we could consume or produce. According to Domo’s Data Never Sleeps 8.0 report, it is estimated that every minute around 350k stories and 150k photos are posted on Instagram and Facebook. Moreover, Zoom hosts around 208,333 meeting participants in. These days, sending pictures of anything and everything is almost instantaneous and we rarely spare a thought for just how much power it takes to send them. Part of this stems from mobile phone operating systems using image compression technologies, such as HEIF (high-efficiency image format). However, image compression needs even more research atention when it comes to sending images in urgent situations, such as in smart healthcare, or from the furthest corners of our universe as we explore new worlds via satellites. Reducing the image data size will reduce its storage requirements and the energy and time required to send it via low-bandwidth communication and/ or critical communication channels.
A team of researchers from Khalifa University has investigated a memristor-based image compression architecture to speed up image compression while also making the devices using this technology much smaller and more energy efficient.
The team comprised Dr. Yasmin Halawani, Post-doctoral Researcher, Dr. Baker Mohammad, Associate Professor, Dr. Mahmoud Al-qutayri, Professor, all from the System on Chip Center and Department of Electrical and Computer Engineering at Khalifa University, and Dr. Said Al-sarawi from the Centre for Biomedical Engineering at the University of Adelaide, Australia.
Dr. Halawani explained in her doctoral thesis that today’s devices are “jam-packed with a variety of sensors, which are collectively expected to generate more than 40 zetabytes in 2020.” That’s one billion terabytes of data or one trillion gigabytes.
“This huge amount of generated data needs to be processed at a fast rate using complex algorithms to interpret the information,” explained Dr. Halawani. “This is computationally demanding, but Internet-of-things devices tend to be energy-constrained and have limited resources, so innovative architectures and technologies that enable efficient computation are needed.”
Conventional computing faces serious challenges in overcoming these constraints.
“At the device level, technologies are fast approaching their physical and power limits, while at the architectural level, there are limits to computing throughput that we have yet to solve,” explained Dr. Halawani.
A wide range of emerging memory technologies has been investigated to address these challenges, including resistive random access memory (RERAM), which is a promising technology for building efficient in-memory computing (IMC) architectures, thanks to its ability to perform both storage and computation in the same physical device.
One such RERAM device is the memristor. A memristor device consists of metal oxide sandwiched between two electrodes. It has the ability to change its resistance state under the application of suitable voltage. As the name implies, the memristor can remember its last writen state, even if power is turned off, which offers great potential for use as a solid-state computer memory device.
Unlike traditional solid-state storage technologies, memristors require less energy to operate, last longer, and store at least twice as much data. They use brain-inspired architectures that allow them to perform in-memory computing. This solves a big issue in traditional computer architectures, referred to as the memory wall, by eliminating the need to move data from memory to the processing unit in order to perform computing functions.
Memristors employ a crossbar architecture, which involves multiple inputs connected to multiple outputs in a matrix design. This design can speed up the multiply and add operations found in many digital signal processing algorithms in a smaller device using less power.
“When these RERAM devices are built in a crossbar architecture, they can offer significant savings in energy, area and execution time,” said Dr. Halawani. “Plus, the low power requirement makes them an ideal candidate for resource-constrained Internet-of-things applications .”